4 July 2000

QED to commercialise new reliable and cost effective chip and component mounting technology.

A revolutionary new method for mounting semiconductors and passive components on circuit substrates has been developed by US Corporation STS ATL. This new technology, called MicroSite, has significant implications for the electronics assembly industry. MicroSite significantly reduces the physical size and production costs of circuit assemblies, as well as facilitating thin and flat semiconductor packages.

STS ATL, its commercial collaborator the LAN-Link Corporation and QED announced today they have entered into an exclusive commercialisation agreement regarding technologies to attach semiconductors and components to chip carriers and circuit assemblies. Patent applications are pending in the US and UK, and are being filed in other territories.

STS ATL and LAN-Link are working with QED, specialists in IP licensing, to make MicroSite more widely available to the electronics assembly industry. QED is offering licences for the use of this technology. The first licensees of MicroSite are expected later this year.

David Hulston, Managing Director, QED Intellectual Property Ltd said: "QED welcome the opportunity to be involved in commercialising yet another significant new technology. We believe MicroSite will bring wide ranging benefits to the electronics manufacturing industry and to the consumer."

About MicroSite technology

The distinguishing features of MicroSite are:

• Semiconductors and passive components may be embedded within the substrate
• Surface mount components may be mounted over embedded parts
• The substrate may be rigid or flexible
• The processed substrates may be used singly or as laminated modules
• Replaces wire bonding of perimeter I/O semiconductors
• Negates glob top surface topography
• Enables mechanical connection of micro passive components
• Provides smaller interconnect dimensions on a PCB
• All conventional attachment methods, i.e. flip chip, ultrasonic, conductive adhesive may be employed using MicroSite

  The competitive and commercial advantages of MicroSite include:

• Significant reductions in PCB size and cost
• Allows for a flat chip carrier profile, important to the RFID and smart-card market
• Reduced manufacturing costs through replacement of wire bonding process
• Increased reliability and simplicity of connection of die to substrate
• Potentially increased feature density for a given PCB area which is particularly advantageous to the consumer electronic goods market
• All necessary hardware for the manufacturing process is industry standard and compatible with existing substrate manufacturing technology

   

About LAN-Link Corporation

LAN-Link Corporation is an established leader in RFID technology, based in St Louis and with offices in Washington DC, Los Angeles, Phoenix and Dallas.

About STS ATL Corporation

STS ATL, based in Atlanta, has a history of developing and implementing advanced technologies for use in the electronics industry.

For further details contact:

Dr. Gordon Lovis - QED Email: glovis@qed-ip.com Tel: [44] 208 848 6594
Ms Naeema Ali - QED Email: nali@qed-ip.comTel: [44] 208 848 6671

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